That's for a different reason. Let's say you have 4 models of a chip, some with more internal RAM & Flash some with less and some with a couple of peripherals and features, and some with less. It is far less expensive to design one model with everything, and then disable some features either by not bonding the chip pads it to package pins or by laser cutting fuses.
One of the most expensive aspects of chip manufacturing is the setup cost, i.e. the mask and "tooling". So it is much cheaper for them to it once and have one chip that rolls of the line.
Also, things like RAM and EEPROM have fabrication errors just like other parts of the chip. It isn't uncommon to have "self healing" RAM. Basically the RAM has a few more cells or address rows more than the actual capacity. As part of wafer testing certain paths are cut so you still end up with the amount of RAM you need. Although it takes up a bit more area (because you're actually manufacturing more RAM) you still end up with higher overall yield.
So as chips come off the line, some get binned into lower grades, or RAM size and the rest of the features are disabled via laser cutting fuses or vias.
Yeah, that's what he said. So, that makes two of you saying this is industry standard for cost-cutting and increasing yield. I'd probably do the same if I made chips. We do it in security engineering for high assurance stuff for similar reasons: the more flexible, certified design can be reused in many applications with minimal extra work & (hopefully) max ROI.
One of the most expensive aspects of chip manufacturing is the setup cost, i.e. the mask and "tooling". So it is much cheaper for them to it once and have one chip that rolls of the line.
Also, things like RAM and EEPROM have fabrication errors just like other parts of the chip. It isn't uncommon to have "self healing" RAM. Basically the RAM has a few more cells or address rows more than the actual capacity. As part of wafer testing certain paths are cut so you still end up with the amount of RAM you need. Although it takes up a bit more area (because you're actually manufacturing more RAM) you still end up with higher overall yield.
So as chips come off the line, some get binned into lower grades, or RAM size and the rest of the features are disabled via laser cutting fuses or vias.